Logic Design for Array-Based Circuits

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White, WhitePubs Enterprises, Inc.

• Table of Contents
  
• Preface
  
• Overview
  
• Chapter 1 Introduction
• Chapter 2 Structured Design Methodology
• Chapter 3 Sizing the Design
• Chapter 3 Appendix: Case Study in Sizing a Design
• Chapter 4 Design Optimization
  • Introduction
  • Optimization Approaches
  • Design for Speed
  • Design to Improve Speed
  • Macro options
  • Macro functionality
  • Example of silicon efficiency
  • Alternative implementations
  • Internal Net Delays
  • Wire-ORs when allowed
  • Design to Reduce Internal Cell Utilization
  • Design to Reduce I/O Utilization
  • Design to Fit the Package
  • Example
  • Design to Reduce Power
  • Design to Reduce Cost
  • Basic Design for Circuit Testability
  • Basic Design for Circuit Reliability
  • Design to Reduce Cost
  • Exercises
• Chapter 5 Timing Analysis for Arrays
• Chapter 6 External Set-up and Hold Times
• Chapter 7 Power Considerations
• Case Study: DC Power Computation
• Case Study: AC Power Computation
• Chapter 8 Simulation
• Case Study: Simulation
• Chapter 9 Faults and Fault Detection
• Chapter 10 Design Submission
• ASIC Glossary
  • Glossary A-D
  • Glossary E-K
  • Glossary L-R
  • Glossary S-Z
  • Symbols

Design Optimization

Last Edit July 22, 2001

Design To Reduce Power

Power dissipation is controlled by the number and type of macros chosen. . Some of the variations are summarized in Table 4-8.

Table 4-8 Power And Macro Choices

When the array library has options, the high-speed macros will dissipate more current than the standard option macros. The low-power macros are slower with less current than the standard option macros. Driver macros use more current than non-drivers, while super-drivers may use 2-3 times the current used by a driver that can handle fewer loads.

High-functionality macros are using more of the components in a macro cell so the cells these macros occupy use more current. MSI macros are usually pre-placed to avoid hot-spots and to maintain their timing speci-fications.

Some arrays (such as the AMCC Q5000 Series) offer a power-down feature if a macro output is unused. The newer [1994] Q20000 Series does not have this feature.

For DC power dissipation, overhead current is also a factor. Overhead current is that current that is used when an unpopulated array is plugged into the power supplies. It supplies the internal voltage regulators and reference generators. It is a function of the I/O mode and the power supply configuration.

AC power dissipation computations depend heavily on the switching frequency of the various macros. Depending on the vendor, the number of outputs on the macro is a factor in the AC power equation. If one output is required and the other terminated, the terminated output contributes to the AC power equation. When several variations of a macro exist, and there is a choice, use the macro with a single output if that is what is needed.

The DC power computation can be performed by software supplied by the array vendor. AC power computations are still primarily a manual estimate. (Hardware emulators are in the early stages of AC computation support. Refer to the chapter on power computation.)

Figure 4-5 Optimization - Power Considerations

Optimization Issues - Power

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White , WhitePubs Enterprises, Inc.
For problems or questions on these pages, contact donnamaie@-no-spam-sbcglobal.net