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Logic Design for Array-Based Circuits

Academic Press
Hardcover at Amazon.com
eBook at dacafe.com
What we did before we had EDA -
Schematic capture to wafer fab

 


Q2000 Series Bipolar Arrays

Q20P010/Q20P025


Q20000 Process Cross-Section


Q20000 Internal Cell Turbo-Driver

Q20000 Die Organization

October 2009

AMCC Q20000 Bipolar VINTAGE ARRAY INFORMATION

AMCC discontinued its Array Business Unit January 1995. [ASIC - Application-Specific Integrated Circuit; not to be confused with today's arrays.]

However, as the chips age, people are trying to understand how they work so they can design a replacement. The seminar and the user manual did not contain any base-die (process) information. Everything discussed involved the two-layer metalization.

The textbook on the left is a summary of the information contained in the user's manual, Vol I and Vol II, and the classroom lecture notes. Here are the references.

Q20000 Design Manual Vol 1 (2MB) plus the Q20000 MIL5 Macro Library Specification (210)

Q20000 Rapid Reference and Quickstart (210) Fast Summary of the Q20000 Bipolar Array Series Design Specifications (Approximately 1992) The Q20000 Series maxed at 20,000 equivalent gates - a sub-block in today's designs which can hit 12 million equivalent gates. Interestingly enough, the basic design flow remains the same. Physics is physics.

Q20000 Data Sheet This is on-line.


If you design today - you may not have a good overview of all the pieces or why we did what we did then, and you do what you do now. Having a good understanding of the physical design issues as well as the logical design issues makes a better designer. Most engineers today focus on only one part of the overall ASIC design flow or indeed, only one software tool (leading to early obsolescence). This seminar covers everything from Macro Selection to Wafer Fab.

A comment on macro selection: Design Compiler does a better job for you if you are intimately acquainted with the macro library you are to use. You can tell the synthesis tool that certain macros are NOT to be used, based on your knowledge of their cell size, power consumption, timing delays and drive. It makes the design reach objectives faster if you remove the "kids off the street".

The Bipolar designers faced tough design issues long before those same problems cropped up in the CMOS world. The BiCMOS, CMOS, and Bipolar arrays share approximately 85% of the same design rules. [Design Flow].

The seminar below essentially covered the material in the above design manual. This version of the seminar (listed below) was for the Q3500 Bipolar array series, while the manual above is later, covering the Q20000 Bipolar array series.


Aray Design Seminar

Q3500 High-Performance Logic Array Design Seminar (pre-edif, pre-Design Compiler, pre-RTL, etc.)

This seminar or a version of it ran from the 1984 (Q700 Bipolar) thru 1995 (Q20000 Bipolar), and covered the BiCMOS series arrays and the CMOS arrays. 85% of the design rules remained fixed regardless of the technology. This seminar had some information on the Q700 and Q1500 Bipolar arrays as well.


These ApNotes were part of the Seminar

     

      

     

 

 

 

 

 

 

 


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